Samsung Electronics has unveiled the blueprint for its world-first LPDDR5X-PIM, a low-power DRAM chip with built-in computing capability. The development is being seen as a potential answer to the growing concentration of high-bandwidth memory chips in AI accelerators — a trend that has contributed to "chipflation," the phenomenon in which semiconductor price pressures drive up component and end-product costs, leaving AI accelerator companies scrambling for alternatives.
Analysts say the breakthrough could propel Samsung Electronics to the forefront of Processing-In-Memory, or PIM — a next-generation memory architecture that performs calculations directly within the chip. The company also expects a first-mover advantage, as the new chip can replace existing LPDDR5 modules without any additional system installation.
Samsung Electronics presented detailed findings on the LPDDR5X-PIM at Hot Chips 2026, held Tuesday (local time) at Stanford University in Palo Alto, California.
The chip had already made its public debut at FMS 2026 in Santa Clara earlier in July, where it won the FMS Best of Show Award.
The LPDDR5X-PIM offers 16 gigabytes of capacity and delivers PIM bandwidth of 614 GB per second — eight times the 76.8 GB per second provided by conventional DRAM alone. Samsung Electronics achieved the performance gain by placing PIM blocks across all 16 banks that make up the chip's storage architecture.
When low-power DRAM handled only data storage, all computation had to be offloaded to processors such as CPUs and GPUs. With PIM, the memory chip can handle simpler operations itself, dramatically improving bandwidth.
The LPDDR5X-PIM is expected to find applications in servers and mobile devices, and is seen as particularly well-suited to the edge AI market — environments such as on-device AI that bypass a central cloud. PIM technology allows high-performance AI workloads to run at low power even without large server infrastructure.
Samsung Electronics is counting on rapid market penetration, having resolved the compatibility issues long seen as the main obstacle to PIM adoption. Because the chip was developed to the package standard set by JEDEC, the international semiconductor standards body, existing LPDDR5 customers can swap in the LPDDR5X-PIM with ease.
Samsung Electronics said it confirmed improved performance in AI operating environments. When the LPDDR5X-PIM was installed in its own edge AI accelerator system-on-chip and used to run a large language model, inference speed was 2.28 times faster and token throughput 3.01 times higher compared with the LPDDR5X. The results, the company said, validate PIM as a practical solution to AI inference bottlenecks.
PIM is emerging as a new alternative amid chipflation, with memory costs now accounting for more than 60 percent of AI accelerator expenses. That share has climbed from 52 percent in the first quarter of 2024 to 63 percent in the fourth quarter of last year.
HBM accounts for the bulk of those memory costs. As HBM has become the go-to solution for AI inference, spending by AI accelerator companies has become unavoidable. Nvidia's recent notification to some customers of a 15 percent price increase on AI servers shipping in early next year has also been attributed to rising memory costs.
Despite its high-bandwidth strengths, HBM carries drawbacks — high power consumption and complex packaging. That is part of the reason Samsung Electronics is now proposing the LPDDR5X-PIM as a new form factor. The company has been working to integrate PIM into its memory lineup since the early 2020s, arriving at the current design through that process.
Samsung Electronics is the first in the memory industry to apply PIM to low-power DRAM, giving it an expected first-mover advantage. SK hynix and Micron are understood to be preparing to introduce PIM technology starting with the next generation, LPDDR6.
jeongwan@heraldcorp.com