IBM develops world's first 0.7nm process technology
Vertical stacking replaces flat, dense transistor layouts
New path breaks through Moore's Law limits
'Will advance to 1 angstrom,' IBM says
Current leading-edge process is 2nm, with TSMC, Samsung and Intel racing to commercialize
IBM has unveiled a 0.7-nanometer (7 angstrom) semiconductor technology — the first in the world to break through the 1nm barrier.
Semiconductor technology has traditionally advanced by making transistors smaller and packing them more densely onto a flat surface, but that approach has been running up against physical limits. IBM chose to stack transistors vertically instead, and announced plans to continue miniaturizing all the way down to a 1-angstrom (one ten-billionth of a meter) node.
On Thursday, IBM said it would develop NanoStack, a new transistor architecture based on 0.7nm process technology — the world's first sub-1nm chip design. The current leading-edge process stands at 2nm, where TSMC, Samsung Electronics and Intel are locked in a race to commercialize the technology.
IBM said the chip integrates about 100 billion transistors in a fingernail-sized area, doubling the density of the 2nm chip it unveiled in 2021. Computing performance is 50 percent higher than the 2nm chip, SRAM space efficiency improves by 40 percent, and energy efficiency is 70 percent better.
The key innovation is the NanoStack architecture. Until now, semiconductor performance has improved by shrinking circuits to pack more transistors into a fixed flat area. As transistor spacing reached its physical limits, current leakage, heat generation and rising interconnect resistance created barriers that could not be overcome. That led many to conclude that Moore's Law — the principle that the number of transistors on a chip doubles roughly every two years — had run its course.
To overcome those limits, IBM turned to three-dimensional vertical stacking. Transistors are stacked on top of one another and arranged in an offset pattern between layers. The architecture also allows different semiconductor materials to be combined or positioned as needed, making it well suited for designing AI-specific chips.
IBM said the technology is well matched to AI workloads — the intensive computing tasks required to run AI systems — because it accelerates data transfer between processors and memory chips, cutting the power costs of operating AI data centers. The ability to design specialized chips tailored to AI computing tasks more freely is an added advantage, the company said.
IBM plans to commercialize the technology within five years. "NanoStack is a general-purpose technology that can be used across all domains — CPUs, GPUs, mobile chips and beyond," the company said, adding that it would serve as "a new device platform driving the expansion of the semiconductor industry for more than a decade to come."
IBM said it will continue advancing sub-1nm technology. Huiming Bu, vice president of global semiconductor research and development at IBM Research, said NanoStack is not a one-off breakthrough. "Over the next decade, products based on this architecture will emerge across multiple generations — from 7 angstroms to 5, then 3, and ultimately 1 angstrom," he said.
IBM is currently co-developing 2nm mass production technology with Japanese foundry Rapidus and said it has not yet chosen a commercialization partner for the 0.7nm technology. Jay Gambetta, head of IBM Research, said the company is focused first on making 2nm production a success with Rapidus, and will consider industrialization options for the new technology afterward.
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