INDUSTRY

Samsung, SK hynix to unveil next-gen AI memory strategies at OCP Summit next week

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Kim Hyun-il
Published : Oct. 7, 2026 - 14:23:35
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2026 OCP Global Summit runs Monday through Thursday in San Jose

AMD CEO Lisa Su to deliver keynote; Nvidia, Google among attendees

Memory wall bottleneck drives focus on next-generation HBM and CXL roadmaps

The Open Compute Project Foundation will hold the 2026 OCP Global Summit in San Jose, California, from Monday through Thursday under the theme "Scaling Innovation for the AI Era." [OCP Foundation]
The Open Compute Project Foundation will hold the 2026 OCP Global Summit in San Jose, California, from Monday through Thursday under the theme "Scaling Innovation for the AI Era." [OCP Foundation]

Samsung Electronics and SK hynix will present next-generation AI memory roadmaps aimed at breaking through the "memory wall" at the 2026 OCP Global Summit, opening Monday (local time) in San Jose, California.

Amid explosive growth in AI infrastructure, memory performance has struggled to keep pace, creating a bottleneck that has drawn industry-wide attention. Both companies plan to unveil strategies built around next-generation high-bandwidth memory (HBM) as well as Compute Express Link (CXL), widely regarded as the successor to HBM.

The Open Compute Project (OCP) Foundation will host the 2026 OCP Global Summit from Monday through Thursday under the theme "Scaling Innovation for the AI Era," according to industry sources Wednesday.

Leaders across the AI sector — including Nvidia, Google, Meta, Microsoft and Broadcom — are set to attend, with AMD CEO Lisa Su drawing particular attention as the keynote speaker.

In the executive session, where senior officials from each company take the stage, Samsung Electronics Senior Vice President Shim Ho-jun, who heads the memory strategy and marketing division, and SK hynix Executive Vice President Kim Ho-sik, who oversees memory systems research, are both scheduled to present.

Samsung Electronics Senior Vice President Shim Ho-jun. [Samsung Electronics]
Samsung Electronics Senior Vice President Shim Ho-jun. [Samsung Electronics]

Samsung Electronics plans to present a next-generation memory architecture designed to address AI-era bottlenecks across three dimensions: speed, capacity and persistence.

On the speed front, the company will introduce custom HBM, a three-dimensional "zHBM" that stacks HBM directly on top of a processor, and "LPDDR-PIM," which adds computing functions to low-power DRAM. All three products are designed to shorten data-travel distances and significantly boost processing speeds.

To push past memory capacity limits, Samsung will also propose "CMM-D" and CXL memory pooling. CMM-D is a CXL-based DRAM memory module. CXL links CPUs, GPUs and storage devices into a unified system, enabling faster data processing while expanding overall system capacity and bandwidth.

The company will also highlight memory pooling, which combines multiple CXL memory units into a shared pool from which resources can be drawn as needed. The approach allows flexible scaling of memory capacity for tasks requiring long-context processing.

Samsung will additionally outline plans to integrate high-capacity storage — such as PCIe Gen 6-based solid-state drives — into the memory hierarchy, underscoring its push to innovate across the broader next-generation AI memory architecture rather than competing solely on HBM performance.

SK hynix Executive Vice President Kim Ho-sik. [SK hynix]
SK hynix Executive Vice President Kim Ho-sik. [SK hynix]

SK hynix will introduce a memory-centric AI rack system engineered to overcome memory bottlenecks. An AI rack consolidates CPUs, GPUs, storage and networking equipment into a single large cabinet. As computing workloads grow increasingly complex, server racks have emerged as a critical piece of AI data center infrastructure, surpassing individual chips in strategic importance.

SK hynix plans to show how next-generation HBM and CXL technology can tightly interconnect multiple CPUs, GPUs and memory units within an AI rack, enabling shared use of memory across the entire rack. This rack-level memory pooling is expected to minimize data movement during AI computation, reducing memory bottlenecks in the process.

Meanwhile, as interest in the OCP Global Summit has surged alongside the expansion of AI infrastructure, organizers announced that starting next year the event will move to the Moscone Center in San Francisco to accommodate more participants and exhibitors.


joze@heraldcorp.com
This content was produced with the assistance of AI translation services.

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