Samsung, SK hynix to unveil next-generation memory-computing chips at global semiconductor conference next month

Samsung Electronics and SK hynix will present next-generation memory technologies designed to ease the computational burden of AI inference at a leading computer architecture conference in Athens, Greece, next month. The core idea is to shift some of the processing load concentrated in GPUs to memory chips.

Researchers from both companies are set to participate in multiple presentations at MICRO 2026, which runs from Oct. 31 to Nov. 4, according to industry sources.

Co-hosted by the IEEE and the ACM, the International Symposium on Microarchitecture is widely regarded as the world's foremost forum on semiconductor and computer architecture, covering design and performance advances in CPUs, GPUs and memory chips. Last year's edition was held in Seoul; this year's moves to Athens.

Among the highlights are presentations combining memory with computing capability. Researchers from SK hynix and KAIST will introduce NELSSA, an LLM serving system that pairs GPUs with processing-near-memory units, or PNM.

As agentic AI spreads, the context lengths that AI systems must handle have grown from hundreds of tokens to hundreds of thousands. When short and long requests arrive simultaneously, GPU memory can fill up with long-context data, dragging down overall throughput. NELSSA addresses this by routing short requests to the GPU and long ones to the PNM, splitting the computational workload accordingly.

The research team built a working hardware prototype of NELSSA. By connecting the PNM device to the GPU over a CXL-based infrastructure, the system achieved up to 5.5 times higher decoding throughput — measured in tokens per second — compared with a GPU-only setup.

Samsung Electronics will present AMMA (A Multi-Chiplet Memory-Centric Architecture), developed with researchers from UC San Diego, Yonsei University and Nvidia. AMMA is an accelerator architecture that centers computation around HBM, again distributing some of the processing work to memory rather than concentrating it entirely in the GPU.

Generating the next token in a long context requires repeatedly reading past information stored in memory. In that process, the speed at which data can be fetched from memory — not the GPU's raw compute power — becomes the performance bottleneck. AMMA replaces the GPU's compute die with an HBM-PNM configuration to increase memory bandwidth.

Simulation results showed meaningful performance gains over a GPU-only system. Compared with Nvidia's H100 GPU, AMMA reduced inference latency to one-sixteenth and cut energy consumption to one-seventh.

Beyond these flagship presentations, both companies will showcase a range of other technologies that move away from GPU-only computation. C3, a study involving SK hynix researchers, explores accelerating LLM inference through cooperation between a CPU and general-purpose DRAM. DUALign addresses the challenge of efficiently placing data close to compute units in PNM-based LLM serving.

SYMPHONY, a project involving Samsung Electronics researchers, focuses on optimizing memory operations and communication for LLM inference on 3D DRAM accelerators. A separate presentation co-authored with KAIST researchers examines running computation and communication concurrently within an LLM system — an approach aimed at eliminating the idle time a system would otherwise spend waiting between a completed calculation and the start of the next.